Monday 28 May 2012

Examples of use


The Cyrix 6x86, the only x86-compatible desktop processor to incorporate a dedicated scratchpad.
SuperH, used in Sega's consoles, could lock cachelines to an address outside of main memory for use as a scratchpad.
The Sony PS1's R3000 had a scratchpad instead of an L1 cache. It was possible to place the CPU stack here, an example of the temporary workspace usage.
Sony's PS2 Emotion Engine employed a 16KiB scratchpad, to and from which DMA transfers could be issued to its GS, and main memory.
The Cell's SPEs are restricted purely to working in their "local-store", relying on DMA for transfers from/to main memory and between local stores, much like a scratchpad. In this regard, additional benefit is derived from the lack of hardware to check and update coherence between multiple caches: the design takes advantage of the assumption that each processor's workspace is separate and private. It is expected this benefit will become more noticeable as the number of processors scales into the "many-core" future.
Many other processors allow L1 cache lines to be locked.
Most digital signal processors use a scratchpad. Many past 3D accelerators and game consoles (including the PS2) have used DSPs for vertex transformations. This differs with the stream based approach of modern GPUs which have more in common with a CPU cache's functions.
NVIDIA's 8800 GPU running under CUDA provides 16KiB of scratchpad per thread-bundle when being used for GPGPU tasks.
Ageia's PhysX chip utilizes scratchpad RAM in a manner similar to the Cell; its theory states that a cache hierarchy is of less use than software managed physics and collision calculations. These memories are also banked and a switch manages transfers between them.

No comments:

Post a Comment